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For the JFET ampli er of Fig. 4-20, nd expressions for (a) the voltage-gain ratio Av1 Vo =VG and (b) the voltage-gain ratio Av2 V1 =VG . Ans: a Av1 RS = 1 RS RD rds ; b Av2 RD = 1 RS RD rds Frequently, in integrated circuits, the gate of a FET is connected to the drain; then the drain-to-source terminals are considered the terminals of a resistor. Starting with (7.2), show that if ) 1, then the smallsignal equivalent circuit is no more than a resistor of value 1=gm . For the CS ampli er of Fig. 7-2(b), nd (a) the input impedance Rin and (b) the output impedance Ro . Ans: a Rin RG ; b Ro rds For the CD ampli er of Fig. 7-3(b), nd (a) the input impedance Rin and (b) the output impedance Ro . Ans: a Rin RG ; b Ro rds = 1 For the CG ampli er of Fig. 7-4, nd (a) the input impedance Rin and Ans: a Rin RS RD rds = 1 RS RD rds ; b Ro rds (b) the output impedance Ro .

Fig. 7-34

The total surface area S of the rectangular solid is then S 2lw 2lh 4 pr2 2prh 2pr(r h)

In the circuit of Fig. 7-26, the two FETs are identical. Find (a) the voltage-gain ratio Av vo =vi and (b) the output impedance Ro . Ans: a Av RL jf2 RL 2 1 R rds g; b Ro 1 1 R rds 2

Fig. 7-35

Fig 17-14

With the switch on 1, the 100-V source results in vC 0 100 V; and, by continuity of charge, vC 0 vC 0 . In position 2, with the 50-V source of opposite polarity, vC 1 50 V. Thus, B vC 1 50 V A vC 0 B 150 V 1 s 200

G RC RG S RS + Lo1 _

Fig. 17-15

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and C 20 mF, has two voltage sources in series, v1 25u t V v2 25u t t 0 V Obtain the complete expression for the voltage across the capacitor and make a sketch, if t 0 is positive.

Fig. 7-26

Fig. 17-16

The capacitor voltage is continuous. For t 0, v1 results in a capacitor voltage of 25 V. For 0 t t 0 , both sources are zero, so that vC decays exponentially from 25 V towards zero: vC 25e t=RC 25e 10t

Fig 17-17

Fig. 7-27

t 0

Finding total surface areas of solids Find, to the nearest integer, the total surface area of (a) A cube with an edge of 5 m (Fig. 17-18) (b) A rectangular solid with dimensions of 10 ft, 7 ft, and 42ft (Fig. 17-19) (c) A sphere with a radius of 1.1 cm (Fig. 17-20)

In particular, vC t 0 25e 10t (V). For t ! t 0 , vC builds from vC t 0 towards the nal value 25 V established by v2 : vC vC t 0 vC 1 e t t =RC vC 1 25 1 e10t 1 e 10t Thus, for all t, vC 25u t 25e 10t u t u t t 0 25 1 e10t 1 e 10t u t t 0 V See Fig. 7-36.

For the cascaded MOSFET ampli er of Fig. 7-21 with equivalent circuit in Fig. 7-22, nd impedance Rin and (b) the output impedance Ro . Ans: a Rin R11 R12 = R11 R12 ; b Ro rds2 RD2 = rds2 RD2

Fig. 17-18

0 0 0

In the cascaded FET-BJT circuit of Fig. 7-27, assume hre hoe 0 and hie ( RD . (a) Av1 vo1 =vi and (b) Av2 vo2 =vi . Ans: a Av1 hfe 1 RS = 1 hfe 1 RS hie rds ; b Av2 hfe RC hfe 1 RS = 1 hfe 1 RS hie rds

Fig. 17-19

Fig. 7-36

Fig. 17-20

7.25 The capacitor in the circuit shown in Fig. 7-37 has initial charge Q0 800 mC, with polarity as indicated. the switch is closed at t 0, obtain the current and charge, for t > 0. Ans: i 10e 25 000t A ; q 4 10 4 1 e 25 000t C If

Suppose the ampli er of Problem 4.25 has plate resistance rp 20 k and vS 1 cos !t V. ampli cation factor using the small-signal voltage-source model of Fig. 7-9(b). Ans: 30

Fig. 7-38 Fig. 7-37

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