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Dielectrics historically has had signi cant focus on the reliability due to the need to understand dielectric breakdown [51 60]; MOSFET electric eld scaling theory requires the continuous scaling of the thin oxide to achieve MOSFET device performance Additionally, dielectric breakdown during electrical overstress (EOS) and electrostatic discharge (ESD) had signi cant focus due to the concern of MOSFET gate dielectric breakdown and failure during ESD events [61 81] A primary focus has been on the failure of NMOS and CMOS digital receiver networks where the MOSFET inverter circuit failure occurred in the n-channel MOSFET gate dielectric CMOS digital receiver networks failure concerns occurred as a result of the human body model (HBM), machine model (MM), and charged device model (CDM) [66] Considerable focus has been given to the CDM and its impacts on MOSFET gates in CMOS receiver networks [62,66 70].



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The focus will change in RF applications as a result of the unique placement of the capacitor elements in peripheral circuits, where capacitor passive elements play a new role in circuits with signi cant topology different from digital CMOS receiver and transmitter circuits In RF CMOS and BiCMOS Silicon germanium, on-chip capacitor elements are needed for RF applications On-chip capacitor passive elements are used in peripheral circuits in RF applications Capacitors are used in many receiver and transmitters circuits in RF applications from low noise ampli ers (LNA), voltage controlled oscillators (VCO) to RF power ampli ers (PA) Capacitor elements are used in the following applications with RF circuits: Direct current (dc) blocking capacitors Input and output matching networks Output-to-input feedback subnetworks LC tank circuits Capacitor elements are also integrated into semiconductor chips for frequency-triggered ESD networks which respond to the ESD pulse waveform.





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Capacitor elements are integrated into trigger networks and as impedance isolation elements for RF ESD input circuits and ESD power clamps, for the following: capacitor-coupled trigger networks; resistor capacitor (RC) trigger networks; LC-tank impedance isolation networks..

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Stated as concisely as possible, the basic ideas underlying inference networks are these: under certain conditions a distribution on a multidimensional domain (for example a probability distribution), which encodes prior or generic knowledge about this domain, can be decomposed into a set { 1 , , s } of (usually overlapping) distributions on lower-dimensional subspaces If such a decomposition is possible, it is sufficient to know the distributions on the subspaces to draw all inferences in the domain under consideration that can be drawn using the original distribution Since such a decomposition can be represented as a network or graph and since it is used to draw inferences, we call it an inference network Another popular name is graphical model, indicating that it is based on a graph in the sense of graph theory.

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Although this description of the ideas underlying inference networks mentions all essential ingredients, it is necessarily too condensed to be easily comprehensible, so let us explain first in a little more detail the main notions used in it Later we will provide some illustrative examples By multidimensional domain we mean that each state of the section of the world to be modeled can be described by stating the values of a set of attributes (cf page 16) For example, if we want to describe cars, we may choose to state the manufacturer, the model, the color, whether the car has certain special equipment items or not, etc Each such attribute or, more precisely, the set of its possible values forms a dimension of the domain Of course, to form a dimension, the possible values have to be exhaustive and mutually exclusive.

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