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Figure 46-2: Input port processing Given the existence of a routing table, the routing table lookup is conceptually simple -- we just search through the routing table, looking for a destination entry that matches the destination address of the datagram, or a default route if the destination entry is missing In practice, however, life is not so simple Perhaps the most important complicating factor is that backbone routers must operate at high speeds, being capable of performing millions of lookups per second Indeed, it is desirable for the input port processing to be able to proceed at line speed, ie, that a lookup can be done in less than the amount of time needed to receive a packet at the input port In this case, input processing of a received packet can be completed before the next receive operation is complete To get an idea of the performance requirements for lookup, consider that a so-called OC48 link runs at 25 Gbps With 256 byte long packets, this implies a lookup speed of approximately a million lookups per second Given the need to operate at today's high link speeds, a linear search through a large routing table is impossible A more reasonable technique is to store the routing table entries in a tree data structure Each level in the tree can be thought of as corresponding to a bit in the destination address To lookup an address, one simply starts at the root node of the tree If the first address bit is a zero, then the left subtree will contain the routing table entry for destination address; otherwise it will be in the right subtree The appropriate subtree is then traversed using the remaining address bits -- if the next address bit is a zero the left subtree of the initial subtree is chosen; otherwise, the right subtree of the initial subtree is chosen In this manner, one can lookup the routing table entry in N steps, where N is the number of bits in the address (The reader will note that this is essentially a binary search through an address space of size 2N) Refinements of this approach are discussed in [Doeringer 1996].



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But even with N=32 (eg, a 32-bit IP address) steps, the lookup speed is not fast enough for today's backbone routing requirements For example, assuming a memory access at each step, less than a million address lookups/sec could be performed with 40 ns memory access times Several techniques have thus been explored to increase lookup speeds Content addressable memories (CAMs) allow a 32bit IP address to be presented to the CAM, which then returns the content of the routing table entry for that address in essentially constant time The Cisco 8500 series router [Cisco 1998a] has a 64K CAM for each input port Another technique for speeding lookup is to keep recently accessed routing table entries in a cache [Feldmeier 1998] Here, the potential concern is the size of the cache Measurements in [Thompson 1997] suggest that even for an OC-3 speed link, approximately 256,000 sourcedestination pairs might be seen in one minute in a backbone router Most recently, even faster data structures, which allow routing table entry to be located in log(N) steps [Waldvogel 1997], or which compress routing tables in novel ways [Degemark 1997], have been proposed A hardware-based approach to lookup that is optimized for the common case that the address being looked up has 24 or less significant bits is discussed in [Gupta 1998] Once the output port for a packet has been determined via the lookup, the packet can be forwarded into the switching fabric However, as we'll see below, a packet may be temporarily blocked from entering the switching fabric (due to the fact that packets from other input ports are currently using the fabric) A blocked packet must thus be queued at the input port and then scheduled to cross the switching fabric at a later point in time We'll take a closer look at the blocking, queueing and scheduling of packets (at both input ports and output ports) within a router in section 464 below.

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Integrated Modular Avionics (IMA) is a new packaging technique which could move electronic packaging beyond the ARINC 600 era. ARINC 600 as described earlier relates to the speci cation of in recent transport aircraft LRUs and this is the packaging technique used by many aircraft ying today. However the move towards a more integrated solution is being sought as the avionics technology increasingly becomes smaller and the bene ts to be attained by greater integration become very attractive. Therefore the advent of Integrated Modular Avionics introduces an integrated cabinet approach where the conventional ARINC 600 LRUs are replaced by fewer units.

Figure 11.22. Switching behavior of diffracted probe light with a lm of the shown azobenzene-containing side-chain liquid crystalline polymer at 143 1C exposed to writing beams (127 mW/cm2) for 62.5 ms. Source: Yamamoto et al., 2001. Reprinted with permission.

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