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Simple template. .Related: Generate Interleaved 2 of 5 .NET WinForms , VB.NET Data Matrix Generating , ASP.NET Data Matrix Generating A single processor package (or die) is what occupies a socket on the motherboard For very basic single processor machines, this package holds a single processor The simplest way to extend this to a multiprocessor architecture is by adding more sockets to the motherboard and placing completely independent processor packages into them This is SMP, and is the oldest form of parallel hardware that Windows has supported since NT The processors typically share a single bus to a single main memory, and there is some level of caching that is usually shared among them As die sizes shrink (thanks to Moore's Law), and as power consumption and static leakage have become limiting factors, it has become more attrac tive to place additional processors on the same package as an alternative way of providing improved performance This is CMP, is usually called multicore, and is becoming increasingly more common than SMP for client side machines The third kind, HT, is currently only used by some Intel processors and is very similar to CMP The primary (and quite substantial) difference is that the individual logical processors sharing the same package also share execution units instead of being entirely independent It's reasonable for any particular computer to use a any combination of these three, or even all three of them together For example, imagine we have 4 packages (SMP), each with 4 cores (CMP), and each with 2 logical processors (HT) The result is 32 schedulable processors, and by creating that many threads Windows will freely and uniformly schedule threads onto each When looking at what a single processor needs to run, the basics include interrupt controllers, volatile state (Le, registers), a connection to the mem ory system (ordinarily via a shared bus), and a processor core (Le, some thing to actually execute instructions) In both SMP and CMP, each processor has its own independent set of each of these things In HT, however, the processor core itself is shared among more than one logical processor This may seem worthless, but HT can actually be used to hide memory access latencies When one logical processor on a physical package stalls waiting on a memory operation (such as a fetch from main memory), other logical processors on that package can use the xecution. 4 MB Yes; MMC 176 208, 4096/65536 colors No Yes; 640 480 resolution GSM 900/1800/ 1900 HSCSD GPRS (2 + 2, 3 + 1, class B and ) MIDP 1.0 CLDC 1.0 Nokia UI Wireless Messaging Mobile Media Infrared Bluetooth. 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